Electrical characterization and analysis of physical mechanisms involved in trapping and breakdown voltage of GaN devices
Published : 13 December 2016
CEA LETI is involved in the development of several Power devices on GaN substrate. Several facilities are available for studies: MOCVD tool, full process flow for 200 nm wafers, tools for electrical and physical characterization.
The challenges for a full process flow optimization are numerous. GaN wafers may have different structural defects, and trapping mechanisms may occur at the different semiconductor interfaces and impact the power device behavior.
Breakdown voltage of Power devices depends both on device architecture and GaN substrate and its defects.
Trapping mechanism can also impact the concentration of the free two dimension electron gas involved in this high electron mobility transistor (HEMT)leading to current instabilities under bias.
The aim of this thesis is to characterize material defects with the help of electrical characterization and to correlate such electrical characterizations with physical ones in order to propose optimization of both breakdown voltage and current collapse.