Optimization of dielectric/GaN interface for MIS gate power devices
Published : 8 February 2020
To definitively penetrate into the power electronics market, one of the main challenges for GaN remains the development of a reliable normally-off HEMT solution.
In the case of GaN-based MIS channel-High Electron Mobility Transistors (HEMTs), the dielectric/GaN interface properties are critical.
The goal of the thesis is to optimize the dielectric/GaN interface for MIS gate power devices. For this,
1. The dielectric/GaN interface properties will be evaluated by XPS (X-ray Photoelectron Spectroscopy). This technique allows to study the oxidation degree at GaN surface. Additional analyses by ToF-SIMS (Time of Flight Secondary Ion Mass Spectrometry) and HRTEM (High Resolution Transmission Electron Microscopy) will be carried out in order to characterize the materials chemical composition and crystalline structure.
2. GaN-based devices quality will be studied by transistor and capacitance electrical characterization (mobility, on-resistance, channel resistance, threshold voltage, hysteresis), as well as fine electrical measurements (interface state density extraction reliability).
3. The impact of processing steps (wet chemical cleaning, etching, stripping, thermal and plasma treatments)on interface quality will be evaluated, allowing to select the most appropriate MIS gate processing.