Technology and physics of devices for the large-scale fabrication of Si-CMOS process based qubits
Published : 27 February 2019
The fabrication of spin quantum bits has recently been demonstrated from an industrial Silicon-On-Insulator (SOI) CMOS platform, marking an important first step for the fabrication of a quantum computer in Si. Indeed, a massive production of qubits will be necessary for the future quantum processors.
These qubits, to be functional, must imperatively be cooled down to a few tens of mK. Measuring the physical properties of qubits is currently done on individual devices, and requires a lot of time. The preselection of qubit devices potentially functional from the physical and technological parameters measured at 300K and down to 4K, using faster measurements and compatible with a quasi-industrial approach, remains a challenge. Mass production of qubits necessitates tools and electrical characterization methods to produce large data statistics.
The subject of the phD thesis proposed is focused on the electrical characterization (from 300K to 4K-1K) of transistor devices, designed to be functional qubits at very low temperature. The goal is to make the link with the characterization of the qubits themselves at a few tens of mK. This work will open new paths of optimization for the qubit-CMOS technology (technological variants, architecture of transistors, etc.), in order to achieve a greater scale integration.
The thesis will benefit from a unique work environment in Grenoble in the field of “quantum computing” *. The thesis will be performed in the electrical characterization team in CEA-Leti, in close collaboration with the process integration team and researchers in qubit physics of INAC (CEA) and the Néel Institute (CNRS).