Characterization of high-k dielectric/silicon interfaces using second harmonic generation (SHG)

Published : 1 December 2023

                                                    2 YEARS POSTDOCTORAL FELLOW POSITION           

                                                   Characterization of high-k dielectric/silicon interfaces
                                                            using second harmonic generation  (SHG)

                                                                                                Starting date:  January- February 2024
                                                                                                  

Within the IPCEI (Important Project of Common European Interest) on Microelectronics, we work (in collaboration with STMicroelectronics) on the development of a non-destructive characterization method adapted for interfaces between passivation high-k dielectrics and silicon. The
method, based on nonlinear optics, consist in measuring the second harmonic generated (SHG) in the sample; for centrosymmetric materials,
this signal is mainly due to the electric field present at the interface, which is related to interface trap density (Dit) and fixed charges in the oxide (Qox)1

The post-doc will be in charge of development of protocols to identify and separate the two contributions. One of the methods exploited consists in adding an external electric field during the SHG measurement, which should modify the Dit response. Starting from industrial wafers with high-k dielectrics on silicon, a transparent conductive layer (ITO) must be deposited to fabricate MOS capacitors with a transparent gate that are adapted for both SHG under external voltage and
capacitance versus gate voltage measurements. A wide panel of parameters (e.g., laser power, input and output wave polarisations, external electric field …) can be varied. The experimental methodology will be completed by simulation segments on our home-made simulator2 that allows calculating the SH generated in a certain multilayer. The technique can also be tested on other samples/substrates  available.

We are offering:

  •  24-month full-time job in a renowned research laboratory 3, in Grenoble, the French Silicon Valley.
  • A multidisciplinary topic, joining together non-linear optics and semiconductor device physics, with a high potential of dissemination (top-ranked journals and conferences)
  • A combination of experimental and simulation work
  • A position in a dynamic environment: 2 associated professors and 2 support engineers are involved in the topic. 1 or 2 interns will also join us, during your stay
  • The occasion to work in collaboration with a large microelectronics company: the project, funded by IPCEI-ME, is supported by STMicroelectronics .

The successful candidate has:

  • A PhD in optoelectronics/semiconductors physics
  • A good level in English and/or French
  • Willing to progress, self-motivation, autonomy
  • Good interpersonal skills.


Contacts for more information and application (CV – with publications list, motivation letter, …):
Irina IONICA, Irina.Ionica@grenoble-inp.fr
Lionel BASTARD, Lionel.Bastard@grenoble-inp.fr

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1 B. Obeid, L. Bastard, V. Aubriet, K. Courouble, D. Dutartre, I Ionica, “Characterization of Passivation Dielectrics on Silicon
Through Second Harmonic Generation: Effect of Fixed Charge”, ECS Transactions 108 (2), 19, 2022,
https://doi.org/10.1149/10802.0019ecst
2 B. Obeid, I. Ionica, G. Vitrant, D. Damianos, and L. Bastard, “Second Harmonic Generation in Centrosymmetric Multilayered
Structures: Theoretical Approach for Nonlinear Boundary Conditions” Journal of Applied Physics, vol.134, Issue 8, p. 083102, 2023
https://doi.org/10.1063/5.0156004
3 https://imep-lahc.grenoble-inp.fr/en

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