99 results found

[Thesis]

Innovative Confined Phase Change Memories targeting embedded Non Volatile Memory applications for the 28 nm node and beyond

Offer N°: SL-DRT-14-0100

Start date: 1 Oct 2014

In the framework of collaboration with STMicroelectronics, LETI is developing the next generation of embedded Phase Change Memories (PCM), which are thought to be able to overcome the limitations of standard embedded Non-Volatile Memories (eNVM) beyond the 28nm technology node. In this technology, the information is coded using the resistance level of the memory cell, which varies whether the Phase Change Materials is in the amorphous or the crystalline state.



[Thesis]

Technology for selector-less CBRAM/OXRAM memory arrays based on crossbar architecture

Offer N°: SL-DRT-14-0086

Start date: 1 Oct 2014

Among the emerging nonvolatile memories (NVM), resistive memory architectures (storing information bits as the resistance value imposed on a resistive-variable device), such as Phase Change Memories (PCM), Programmable Metallization Cell (PMC) or Oxide Resistive RAM (OxRAM) are nowadays considered among the most promising solutions for future generation of low cost embedded non-volatile memories.



[Thesis]

Sharing of compiled Java programs for low power cloud systems

Offer N°: SL-DRT-14-0743

Start date: 1 Oct 2014

The goal of this PhD is to revisit the relationship between a JVL and the compilation infrastructure in the context of cloud applications, in order to maximize the energy efficiency and minimize latency of the overall solution.



[Thesis]

Nano characterization of switching mechanism in HfO2-based oxide resistive memories

Offer N°: SL-DRT-14-0121

Start date: 1 Oct 2014

Resistive-Switching Random Access Memories based on oxide as switching element (OxRAM), are considered as one of the most promising candidates for replacing or complementing current non-volatile memories, based on FLASH, in next memory generations. Indeed, they have two key advantages compared with the standard FLASH memories which are on one hand a simple integration using existing CMOS fab technology, and on the other hand the low-power/low-energy for the write/erase operations.



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