Thesis, internship, and post-doc opportunities

149 results found

[Thesis]

Study of the surface preparation of III-V and Ge materials with the aim of their integration in the sub 7 nm CMOS transistors

Offer N°: SL-DRT-15-1002

Start date: 1 Sep 2015

Continued performance scaling of silicon MOS transistors meets immense challenges at sub-10 nm. Therefore, scaling-free technologies are now strongly needed to achieve further improvement of CMOS devices. A number of non-silicon channel materials have been considered for advanced CMOS devices such as SiGe or Ge (PMOS) as well as various III-V materials combinations including InGaAs, GaAs, InAs (NMOS).



[Thesis]

Statistical methods for multi-energy tomographic reconstruction using spectral detection systems

Offer N°: SL-DRT-15-0541

Start date: 1 Sep 2015

X-ray tomography (CT) is a well-known technique providing volumetric information about the examined object. Applications are in the medical diagnostic domain, non destructive testing of industrial samples, and security. The emergency of energy resolved semiconductor detectors allows an evolution of this technique, providing enhanced contrasted and material specific volumes. The CEA-LETI “Detectors” Lab has a long experience in the development of such detectors and associated methods.



[Thesis]

Gallium nitride nanowire heterostructures

Offer N°: SL-DSM-15-0510

Start date: 1 Oct 2015

The objectives of this thesis are focused on achieving two types of heterostructures based on gallium nitride (GaN) wires, which have both a strong fundamental interest and well-identified applications:



[Thesis]

Enhancing task scheduling for real-time systems using profiling information

Offer N°: SL-DRT-15-0521

Start date: 1 Oct 2015

In embedded real-time systems, the scheduler plays a central role as it is responsible of the fulfillment of the temporal deadlines that the tasks of an application are subject to, but also of the achievable performances resulting from the effectiveness of its implementation with respect to the underlying hardware architecture.



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