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Innovative Mixed RF and low power devices integration in view of advanced fdsoi SOC

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Start date : 1 October 2020

offer n° SL-DRT-20-1027

Connected mobile devices are becoming a strategic imperative in order to remain attractive, improve efficiency and competitive for advanced electronic applications. The wireless revolution where Laptops, Smartphone’s, tablets, TVs, vehicles and enterprises are connected in a cloud style environment makes possible communication anywhere at any time. Recent developments in wireless communications with the emergence of advanced radio-frequency standard such as LTE, LTE-A and 5 G have brought numerous challenges. The most critical challenge is to provide higher levels of integration with more power efficiency and cost-effective solutions on the same-chip. In parallel to the development of nanometer CMOS as well as beyond-CMOS device technologies for switching, memory and analog functions, the increasing need to integrate various (heterogeneous) technologies (e.g. RF communication, power control, passive components, sensors, actuators) helps to migrate from the system board-level into the system-in- package (SiP) or to the system-on- chip (SoC). In fact, mobile System-on-Chip (SoC) with heterogeneous integration of multiple technologies has truly revolutionized the semiconductor industry. Thanks to the trap-rich Silicon-on-Insulator (SOI) substrate invented at UCL and developed in collaboration with SOITEC, RF SOI presents outstanding RF performance. In addition, the presence of the buried oxide layer not only reduces the junction capacitance but also offers the opportunity of using high resistivity substrate to reduce substrate related RF losses and coupling. However in case of SoC integration the trap-rich is not suitable all across the wafer and localized solutions should be envisaged.

Fabrication on a 28FDSOI 300mm platform of specific RF stuctures

Characterization of the substrate impact (HR, trap rich, etc …) on the RF figure of merit

Imagine and integrate new technological process schemes to implement localized ‘trap-rich like’ area before or after FDSOI device realization.

Integrate some technological modules on new designed structures and electrical caracterization

  • Keywords : Engineering sciences, Technological challenges, Electronics and microelectronics - Optoelectronics, Emerging materials and processes for nanotechnologies and microelectronics, DCOS, Leti
  • Laboratory : DCOS / Leti
  • CEA code : SL-DRT-20-1027
  • Contact : claire.fenouillet-beranger@cea.fr
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