Double quantum wells on a PMOS nanowire transistor

Categorie(s) : MINATEC, News, Research

Published : 4 February 2016

The R&D partnership on advanced CMOS transistors between STMicroelectronics, IBM, and Leti has produced some impressive results. Two silicon-germanium (SiGe) quantum wells separated by a thin layer of silicon have been produced on a PMOS transistor with a grid unit length of 15 nm. The combination of SiGe and silicon results in a 1.5% deformation of the grid unit in the nanowire. This core-shell transistor offers 60% more current capacity than traditional silicon-canal transistors.
The major hurdle in this pioneering R&D was the epitaxial growth of SiGe layers just nanometers thick on a 10 nm silicon core. The research was published in the journal IEEE Electron Transactions on Electron Devices and received the Paul Rappaport Award for the publication’s best article of the year.



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